Semiconductor devices are found in many products used in modern society. Semiconductors find applications in consumer items such as entertainment, communications, and household items markets. In the industrial or commercial market, semiconductors are found in military, aviation, automotive, industrial controllers, and office equipment.
The manufacture of semiconductor devices involves formation of a wafer having a plurality of die. Each die contains hundreds or thousands of transistors and other active and passive devices performing one or more electrical functions. For a given wafer, each die from the wafer performs the same electrical function. Front-end manufacturing generally refers to formation of the devices on the wafer. Back-end manufacturing refers to cutting or singulating the finished wafer into the individual die and then packaging the die for structural support and environmental isolation.
A semiconductor wafer generally includes an active front side surface having integrated circuits formed thereon, and a backside surface formed with bulk semiconductor material, e.g., silicon. During the front-end manufacturing, the wafer is typically subject to a grinding operation on the backside to remove excess bulk semiconductor material. The front side of the wafer is mounted to protective tape and placed front side down on a backing plate or chuck. A grinding wheel 12 is applied in a rotational motion to the backside surface of semiconductor wafer 14 to remove a portion of the bulk semiconductor material and create a substantially planar surface, as shown in FIG. 1. Grinding wheel 12 and wafer 14 each rotate in opposite directions. The backside grinding reduces the thickness of the integrated circuit chips, allows smaller packaging, and reduces stress in laminated packages.
Many manufacturers prefer to use rotational backside grinding on the wafer in lieu of chemical mechanical polishing (CMP) to remove excess semiconductor material and produce a planar surface. The ion contamination in slurry used in CMP can cause electrical malfunctions in the device. However, non-polished wafers still have many problems, including susceptibility of the die to cracking around the edges. The backside grinding may involve coarse grinding followed by fine grinding to remove excess semiconductor material and other irregularities from the backside surface. The grinding process leaves arc-shaped curves or marks in the wafer surface. The grinding marks extend radially outward from the wafer center.
In analyzing semiconductor die failures, the individual die are known to have problems with cracking along lines parallel or normal to the edges of the die. The die failure is attributed to the radial grind marks creating a weak plane in the crystal lattice structure (100) of the silicon wafer. The strength of the die depends upon the angle of the grind marks, ranging from a maximum value at zero degrees to a minimal value at 90 degrees. The highest risk of die cracking occurs when the grind marks run along the same line as the die edge. Intermediate die strength areas occur between about 40-70 degrees. In any case, the angle of the grind marks influences the strength of the wafer and accordingly the rate of die failures due to cracking.
A need exists to reduce die cracking arising from backside wafer grinding.